Each student will select a topic related to Reconfigurable Computing Systems. You should conduct an in-depth study covering the problem to be solved and its origins, developments, and current status. This will involve extensive research; your findings should be documented in a report with the basic references cited. Background reading should include at least five (5) articles. In writing your report you should think about what you have read, and provide your personal opinions about the presentation and usefulness of the work.

General Information

1. Report
2. Presentation
3. List of Topics

   The Project Report Format

   Your project report should be professionally written. It must contain the followings :

   • Cover Page - provides the name of the course, the title of your project, your name, your student identification number, date of submission, and the name of your professor.
   • Table of Contents - lists all chapters, sections, and sub-sections of your report.
   • List of figures - gives the caption of all the figures presented in your report.
   • List of tables - gives the caption of all the tables presented in your report.
   • Introduction - provides sufficient background information of the subject and outlines the scope of your project.
   • Main Body - depicts the theoretical aspects of your project. Schematics of your circuits, theoretical analysis & simulation results should be presented here. Since this section is the main body of your project report, it can always be broken into chapters/sections/sub-sections.
   • Conclusions - summarize your observations, remarks, thoughts, and conclusions obtained from the project work in this section.
   • References - list all books/papers/technical reports/manuscripts/... that are referred in your report. References must include (1) Full authorship, title of books/articles/presentations, full name of journals/conference proceedings, including volume number, month and year of publication and page numbers. For books, the name of publishers, date and place of publication.
   • Appendices - attaches your VHDL codes and other information relavent to the project report.

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   Presentation

   A seminar will be held at the end of the term. You are required to present the results of your projects in the seminar in a formal fashion. Each group will have 45 minutes to present their work and 10 minutes for question and discussion.

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   List of Topics

   The following is a list of suggested topics that can be used as your projects. Some of these projects are design-oriented while others are research-emphasized. The projects are to be carried out in groups with maximum two students per group. A formal project report is due at the end of the term. The grade of the project is based on the quality of your project reports, which is measured on the bases of (1) clearity, (2) correctness, (3) completeness, and (4) novelty.

   1. Filter Design for Image Edge Detector
   2. Direct Memory Access (DMA) on RCS
   3. Acceleration of an FPGA Router
   4. A Reconfigurable Content Addressable Memory
   5. Fixed Point vs. Floating Point Units: A Comparison
   6. Hardware/Software Co-design of Hidden Markov Models (Machine Learning)

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   Filter Design for Image Edge Detector

   Images entering an image processing system often contain more information than is really required for processing. To simplify, the original image is filtered, leaving only the ``interesting'' aspects of the image for further processing. The goal of this project is to design a real time edge detector, which is 1D or 2D filter. Implementation outline:

   • Using pipelined technique to design a 2D filter of image edge detection.
   • Use a 3 MAC engine to design the 2D filter.
   • Each MAC engine will reload its accumulator with an incoming sample after computing the last partial product for an output sample.

   To List of Topics
   

   

   Direct Memory Access (DMA) on RCS

   A special control unit may be provided to allow transfer of a block of data directly between an external device and the main memory, without continous intervention by the processor. This approach is called direct memory accesss, or DMA. VHDL will be used to implement the DMA and will be mapped onto the XS40 board (i.e Xilinx XC4005).

   To List of Topics
   

   

   Acceleration of an FPGA Router

   Placement and routing is undoubtly the most time-consuming process in automatic chip design or configuring programmable logic devices as reconfigurable computing elements. The main goal of this project is to accelerate routing of FPGAs using a Reconfigurable Computing Platform. The hardware accelerator (i.e architecture) should exploit the fine-grain parallelism in routing individual nets.

   • Research the problem of FPGA routing.
   • Identify the portions of the router that are considered to be bottlenecks via profiling and calculate the amount of speedup you might achieve if assigned to hardware.
   • Propose an architecture to speedup the routing of an FPGA.
   • Use VHDL to design your architecture and simulate the system.
   • Map your architecture onto a Reconfigurable Computing Platform and verify the correctness of the architecture.

   To List of Topics
   

   

   A Reconfigurable Content Addressable Memory

   Content Addressable Memories or CAMs are popular parallel matching circuits. They provide the capability, in hardware, to search a table of data for a matching entry. This functionality is a high performance alternative to popular software-based searching schemes. CAMs are typically found in embedded circuitry where fast matching is essential. In this project students are expected to implement a CAM using run-tim reconfiguration.

   • Research the problem of Content Addressable Memory.
   • Propose an architecture to implement the CAM.
   • Use VHDL to design your architecture and simulate the system.
   • Map your architecture onto a Reconfigurable Computing Platform and verify the correctness of the architecture.

   To List of Topics
   

   

   A Comparison of Fixed Point vs. Floating Point Implementations on RCS

   Most practical FPGA designs are limited to finite precision signal processing using fixed-point arithmetic because of the cost and complexity of floating point hardware. Mapping algorithms to FPGAs involves determining the dynamic range and desired precision to ensure that the algorithm performs well and meets the criteria. Are there advantages of using Floating Point Arithmetic Units as compared to the Fixed Point implementations?
   • Research the issue of Floating Point/Fixed Point Arithmetic.
   • Implement Adders/Mulitpliers with different widths using both Fixed/Floating Point.
   • Use VHDL to design your architecture and simulate the system.
   • Map your architecture onto a Reconfigurable Computing Platform and compare between the two approaches.

   To List of Topics
   

   

   Software/Hardware Co-Design of HMM Based Isolated Digit Recognition System

   Speech recognition systems have been developed for many real world applications. The most successful approach to speech recognition is based on the Hidden Markov Model (HMM). It is a probabilistic process, which model spoken utterances as the outputs of finite state machines (FSMs). The algorithm demands increased computing task on the host computer. Hence, as in the case of other machine learning algorithms, it may be advantageous to transfer the algorithm to hardware.
   • Research the issue of Hidden Markov Models or any Machine Learning Algorithm (i.e Support Vector Machines).
   • Implement the algorithm using a soft core in the form of a micro-blaze.
   • Profile the application and identify the bottlenecks.
   • Design a simple hardware accelerator to speed up the bottlenecks and attach to the Microblaze.
   • Map your architecture onto a Reconfigurable Computing Platform and compare between the two approaches.

   To List of Topics
   

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