Complete Publication List

Complete Publication List 1993-2024

Book Chapters: (Published or In Press) A. Younes, A. Elkamel, S. Areibi Genetic Algorithms in Process Engineering: Developments and Implementation Issues Book Chapter in: Stochastic Global Optimization: Techniques and Applications in Chemical Engineering, Vol. 2. 2010, pp:111-145. A. Younes, A. Elkamel, S. Areibi Meta-Heuristics: Evaluation and Reproting Techniques Book Chapter in: Advances in Process Systems Engineering: Stochastic Global Optimization, Volume 2, 2010, pp: 337-352. A. Younes, A. Elkamel, S. Areibi Genetic Algorithms in Chemical Engineering: A tutorial Book Chapter in: Chemical Engineering, 2008. A. Younes, S. Areibi, P. Calamai, O. Basir Adapting Genetic Algorithms for Combinatorial Optimization Problems in Dynamic Environments Book Chapter in: Advances in Evolutionary Algorithms, ARS Publishing, Edited by: WiTold Kosinski, pp:207-230, ISBN978-953-7619-11-4, Sept. 2008. M. Moussa, S. Areibi and K. Nichols On the Arithmetic Precision for Implementing Back-Propagation Networks on FPGA: A Case Study Book Chapter in FPGA Implementations of Neural Networks, Springer, The Netherlands, pp: 37-61, 2006. S. Areibi, Effective Exploration and Exploitation of the Solution Space via Memetic Algorithms Book Chapter in Recent Advances in Memetic Algorithms and Related Search Technologies, Springer-Verlag, Germany, pp: 161-182, 2005.
Refereed Journal Papers: (Published or In Press) T. Martin, C. Barnes G. Grewal and S. Areibi 'Integrating Machine-Learning Probes in FPGA CAD: Why and How?' IEEE Design & Test of Computers, June. 2023. A. Alhyari, H. Szentimrey, A. Shamli, T. Martin, G. Grewal and S. Areibi 'A Deep Learning Framework to Predict Routability for FPGA Circuit Placement' ACM Transactions on Reconfigurable Technology and Systems (TRETS), Pages: 1-28, Volume 14, Issue 3, Articl 16, Sept. 2021. H. Szentimrey, A. Al-hyari, J. Foxcroft, T. Martin, D. Noel, G. Grewal and S. Areibi 'Machine Learning for Congestion Management and Routability Prediction within FPGA Placement' ACM Transactions on Design Automation of Electronic Systems (TODAES), Pages: 1-25, Volume 25, Issue 5, Article 37, Sept. 2020. A. Shamli, G. Taylor, S. Areibi 'Multisource Domain Adaptation for Remote Sensing using Deep Neural Networks' IEEE Transactions on Geoscience and Remote Sensing (TGRS), Pages: 3328-3340, Volume 58, Issue 5, May 2020. A. Alhyari, H. Szentimrey, T. Martin, G. Grewal, S. Areibi 'Novel Congestion-estimation and Routability-prediction Methods based on Machine Learning for Modern FPGAs' ACM Transactions on Reconfigurable Technology and Systems (TRETS), Pages: 1-25, Volume 12, Issue 3, Article 16, Sept. 2019. Z. Abuowaimer, D. Maarouf, T. Martin, J. Foxcroft, G. Grewal, S. Areibi and A. Vannelli 'GPlace3.0: Routability-Driven Analytic Placer for UltraScale FPGA Architectures' ACM Transactions on Design Automation of Electronic Systems (TODAES), Pages: 1-33, Volume 23, Issue 5, Article 66, Sept. 2018. A. Al-Hyari, S. Areibi Design Space Exploration of Convolutional Neural Networks based on Evolutionary Algorithms Journal of Computational Vision and Imaging Systems, Vol 3, No (1), October 2017. A. Elshamli, G. Taylor, A. Berg, S. Areibi Domain Adaptation Using Representation Learning for the Classification of Remote Sensing Images IEEE Journal of Selected Topics in Applied Earth Observations and Remote Sensing, Volume:10, Issue:9, pp:4198-4209, May 2017. A. Al-Wattar and S. Areibi and G. Grewal An Efficient Evolutionary Task Scheduling/Binding Framework for Reconfigurable Systems Journal of Reconfigurable Computing, Volume 2016, Article ID 9012909, pp: 1 -24, March 2016. A. Al-Wattar and S. Areibi and G. Grewal An Efficient Framework for Floor-plan Prediction of Dynamic Runtime Reconfigurable Systems International Journal of Reconfigurable and Embedded systems (IJRES), Vol. 4, No. 2, pp: 99-121, July 2015. R. Collier, C. Fobel, R. Pattison, G. Grewal, S. Areibi Advancing Genetic Algorithm Approaches to Field Programmable Gate Array Placement with Enhanced Recombination Operators Evolutionay Intelligence, Volume 2014, DOI: 10.1007/s12065-014-0114-6, pp: 183-200, October 2014. A. Savich and S. Areibi A Low-Power Scalable Stream Compute Accelerator for General Matrix Multiply (GEMM) VLSI Design, Volume 2014, Article ID 712085, pp: 1-11, February 2014. A. Elhossni, S. Areibi and R. Dony Architecture Exploration Based on GA-PSO Optimization, ANN Modeling, and Static Scheduling VLSI Design, Volume 2013, Article ID 624369, pp: 1-22, August 2013. O. Ahmed, S. Areibi, R. Collier and G. Grewal An Impulse-C Hardware Accelerator for Packet Classification based on Fine/Coarse Grain Optimization International Journal of Reconfigurable Computing, Volume 2013, Article ID 130765, pp:1-23, July 2013. O. Ahmed, S. Areibi and G. Grewal Hardware Accelerators Targeting a Novel Group Based Packet Classification Algorithm International Journal of Reconfigurable Computing, Volume 2013, Article ID 681894, pp:1-33, Feb 2013. A. Savich, M. Moussa and S. Areibi A Scalable Pipelined Architecture for Real-Time Computation of MLP-BP Neural Networks Microprocessors and Microsystems, Volume 36, Issue 2, Pages: 138-150, March 2012. M.Walton, O. Ahmed, S. Areibi and G. Grewal An Empirical Investigation on System/Statement Level Parallelism Strategies for Accerating Scatter Search using Handel-C and ImpulseC Journal of VLSI Design, Volume 12, No. 5, Pages: 1-11, January 2012. O. Ahmed, K. Chatta, S. Areibi and B. Kelly PCIU: Hardware Implementations of an Efficient Packet Classification Algorithm with an Incremental Update Capability International Journal of Reconfigurable Computing, Volume 2011, No. 4, Pages: 1-22, July 2011. M. Xu, G. Grewal, S. Areibi StarPlace: A New Analytic Method for FPGA Placement Integration The VLSI Journal, Volume 44, Issue 3, Pages: 192-204, June 2011. A. Sghaier, S. Areibi, R. Dony Implementation Approaches Trade-offs for WiMax OFDM Functions on Reconfigurable Platforms ACM Transactions on Reconfigurable Technology and Systems, Vol:3, No:3, Pages: 1-28, Sept 2010. A. Nour, Z. Yang, M. Anis, S. Areibi, A. Vannelli, I. Elmasrry A Power-Efficient Multi-Pin ILP Based Routing Methodology IEEE Transactions on CAS, Vol:57, No:1, pages:225-235, January 2010. A. Elhossini, S. Areibi and R. Dony Strength Pareto Particle Swarm Optimization and Hybrid EA-PSO for Multi Objective Optimization Evolutionary Computation Journal, Vol:18, No:1, pages:127-156, January 2010. M. Xu, G. Grewal, S. Areibi, C. Obimbo and D. Banerji Near Linear Wirelength Estimation for FPGA Placement Canadian Journal of Electrical and Computer Engineering, Volume:34, Number:3, pages:125-132, Summer 2009. L. Rakai, L. Behjat, S. Areibi and T. Terlaky A Multi-level Congestion-Based Global Router Hindawi, VLSI Design, Volume: 2009, pages: 1- 13, Sept. 2009. S. Areibi, X. Bao, G. Grewal, D. Banerji and P. Du Meta-Heuristic Based Techniques for FPGA Placement: A Study International Journal of Computers and Applications, Vol. 16, No. 1, pp:13-33, March 2009. C. Freeman, R. Dony and S. Areibi A Comparison of Classification Techniques for Audio Environment Classification International Journal of Information Technology and Intelligent Computing, Vol. 2, No. 3, pp: 1-27, June. 2007. S. Coe, S. Areibi, and M. Moussa A Hardware Memetic Accelerator for VLSI Circuit Partitioning International Journal of Computers and Electrical Engineering, Vol. 33, pp:233-248, May 2007. A. Yang, S. Areibi and A. Vannelli An ILP Based Hierarchical Global Routing Approach for VLSI ASIC Design Journal of Optimization Letters (Springer), Vol. 1, No. 3, pp: 281-297, June 2007. A. Savich, M. Moussa and S. Areibi The Impact of Arithmetic Representation on Implementing MLP-BP on FPGAs: A Study IEEE Transactions on Artificial Neural Networks, Vol. 18, No. 1, pp: 240-252, January 2007. W. Wang, S. Areibi, and M. Anis Modelling Leakage Power Reduction in VLSI as Optimization Problems Journal of Optimization and Engineering, Vol. 8, pp:129-162, May 2007. S. Areibi, G. Grewal, D. Banerji and P. Du Hierarchical FPGA Placement Canadian Journal on Electrical and Computer Engineering, Vol. 32, No. 1, pp: 53-64, Winter 2007. S. Li, M. Moussa and S. Areibi Arithmetic Formats for Implementing Artificial Nerual Networks on FPGAs Canadian Journal on Electrical and Computer Engineering, Vol. 31, No.1 pp: 31-40, Winter 2006. S. Areibi, M. Moussa and G. Koonar A Genetic Algorithm Hardware Accelerator for VLSI Circuit Partitioning ISCA International Journal of Computers and Their Applications, pp: 163--180, Volume 12, No 3, Sept 2005. S. Areibi and Z. Yang, Effective Memetic Algorithms for VLSI Design = Genetic Algorithms + Local Search + Multi-Level Clustering Journal of Evolutionary Computations, Special Issue on "Memetic Evolutionary Algorithms", pp: 327-353, Vol. 12, No. 3, Fall 2004. D. Kucar, S. Areibi and A. Vannelli, Hypergraph Partitioning Techniques Special Issue of Dynamics of Continuous, Discrete and Impulsive Systems Journal, pp: 341-369, Vol. 11, Issue 2-3, Feb 2004. S. Areibi and A. Vannelli, Tabu Search: Implementation \& Complexity Analysis for Netlist Partitioning ISCA International Journal of Computers and Their Applications, pp: 211-232, Vol. 10, No. 4, December 2003. M. Anis, S. Areibi, M. Elmsary Design and Optimization of Multi-Threshold CMOS (MTCMOS) Circuits IEEE Transaction on CAD, pp: 1324-1342, Vol. 22, No. 10, October 2003. S. Areibi, A. Vannelli, Tabu Search: A Meta Heuristic for Netlist Partitioning VLSI Design Journal, pp: 259-283, Vol. 11, No. 3, 2000. S. Areibi and A. Vannelli, A GRASP Clustering Technique for Circuit Partitioning. Special Issue on Satisfiability Porblems and Applications, ed. D. Du and J. Gu DIMACS Series in Discrete Mathematics and Theoretical Computer Science American Mathematical Society, Providence, R.I., Vol. 35, pp. 711-724, 1997. S. Areibi and A. Vannelli, Advanced Search Techniques for Hypergraph Partitioning Problem. Invited paper, Special Issue on Quadratic Assignment and Related Problems, ed. P.M. Pardalos and H. Wolowicz, DIMACS Series In Discrete Mathematics And Theoretical Computer Science, American Mathematical Society, Providence, R.I,Vol. 16, pp 77-96, 1995
Refereed Conference Papers: C. Barnes, S. Vermeulen, S. Areibi and G. Grewal An Adaptive Analytical FPGA Placement flow based on Reinforcement Learning In International Conference on Microelectronics (ICM2023), UAE, Dec, 2023. T. Martin, C. Barnes, G. Grewal, S. Areibi FPGA Placement: Dynamic Decision Making via Machine Learning In 36th Symposium on Integrated Circuits and Systems Design, Brazil, Aug, 2023. T. Martin, Q. Li, C. Barnes, G. Grewal, S. Areibi A Deep-Learning Data-Driven Approach for Reducing FPGA Routing Runtimes In International Conference on Field-Programmable Technology (FPT2023), Dec, 2023. U. Siddiqi, G. Grewal, S. Areibi A Deterministic Parallel Routing Approach for Accelerating Pathfinder-based Algorithms In VLSI SOC, UAE, Oct, 2023. T. Martin, C. Barnes, G. Grewal, S. Areibi An Adaptive Sequential Decision making Flow for FPGAs using Machine Learning In 34th International Conference on Microelectronics, Casablanca, Morocco, Dec. 2022. U. Siddiqi, T. Martin, S. Van Den Eijnden, A. Shamli, G. Grewal, S. Sait and S. Areibi Faster FPGA Routing by Forecasting and Pre-Loading Congestion Information In 4th ACM/IEEE Workshop on Macine Learning for CAD (MLCAD 2022), Sept 12-13th 2022. T. Martin, C. Barnes, G. Grewal, S. Areibi Integrating Machine-Learning Probes into the VTR FPGA Design Flow 35th Symposium on Integrated Circuits and Systems Design, Minuano, Brazil, Aug. 2022. (Best Track Paper Award) P. Esmaeili, T. Martin, S. Areibi, G. Grewal Guiding FPGA Detailed Placement via Reinforcement Learning 30th IEEE International Conference on Very Large Scale Integration, Patras, Greece, Oct. 2022. M. Fathi, S. Areibi, G. Grewal Using Machine Learning to Predict Operating Frequency During Placement in FPGA Designs In International Conference on Microelectronics (ICM 2021), Cairo, Egypt, Dec. 2021. T. Martin, S. Areibi, G. Grewal Effective Machine-Learning Models for Predicting Routability During FPGA Placement In 3rd ACM/IEEE Workshop on Macine Learning for CAD (MLCAD 2021), August 31st, 2021. T. Martin, G. Grewal, S. Areibi A Machine Learning Approach to Predict Timing Delays During FPGA Placement In IEEE 28th Reconfigurable Architectures Workshop (RAW 2021), May 17, 2021. A. Alhyari, A. Shamli, T. Martin, S. Areibi, G. Grewal An Adaptive Analytic FPGA Placement Framework based on Deep-Learning In ACM/IEEE Workshop on Machine Learning for CAD, November 2020. D. Maarouf, A. Shamli, T. Martin, G. Grewal, S. Areibi A Deep Learning Framework for Predicting Congestion during FPGA Placement In International Conference on Field Programmable Logic & Applications (FPL 2020), Gothenburg, Sweden, 31st August - 4th September, 2020 J. Foxcroft, G. Grewal, S. Areibi Enhancing the Performance of FPGA Congestion Management via Supervised Learning In International Conference on Microelectronics (ICM 2019), Cairo, Egypt, December, 2019 A. Alhyari, A. Shamli, Z. Abuowaimer, G. Grewal, S. Areibi A Deep Learning Framework to Predict Routability for FPGA Circuit Placement In International Conference on Field Programmable Logic & Applications (FPL 2019), Barcelona, Spain, 9th September, 2019 (Best Paper Award) T. Martin, D. Maarouf, Z. Abouwaimer, A. Alhyari, G. Grewal, S. Areibi A Flat Timing-Driven Placement Flow for Modern FPGAs In Design Automation Conference (DAC 2019), Las Vegas, Nevada, USA, June, 2019 A. Alhyari, Z. Abuowaimer, D. Maarouf, G. Grewal, S. Areibi An Effective FPGA Placement Flow Selection Framework using Machine Learning In International Conference on Microelectronics (ICM 2018), Sousse, Tunis, December, 2018 (Best Paper Award) D. Maarouf, A. Alhyari, Z. Abuowaimer, T. Martins, A. Gunter, G. Grewal, S. Areibi, A. Vannelli A Machine-Learning Congestion Estimation Model for Modern FPGAs In International Conference on Field Programmable Logic & Applications (FPL 2018), Dublin, Ireland, 27th August, 2018 (Best Paper Award) G. Lacey, G. Taylor, S. Areibi Stochastic Layer-Wise Precision in Deep Neural Networks In Conference on Uncertainty in Artificial Intelligence, Monterey, California, USA, August 6-10, 2018 D. Jamma, O. Ahmed, G. Grewal, and S. Areibi 'Hardware Accelerators for the K-Nearest Neighbor Algorithm using High Level Synthesis' In 29th International Conference on Microelectronics, Beirut, Lebanon, December 2017. G. Grewal, S. Areibi, M. Westrik, Z. Abuowaimer and B. Zhao `Automatic Flow Selection and Quality-of-Result Estimation for FPGA Placement' In 24th Reconfigurable Architectures Workshop , Orlando, Florida, USA, May 2017. (Best Paper Award) G. Grewal, S. Areibi, M. Westrik, Z. Abuowaimer and B. Zhao `A Machine Learning Framework for FPGA CAD' Poster in ACM/SIGDA International Symposium on Field-Programmable Gate Arrays, Monterey California, February 2017. D. Jamma, O. Ahmed, S. Areibi, G. Grewal and N. Molloy `Design Exploration of ASIP Architectures for the K-Nearest Neighbor Machine-Learning Algorithm' In IEEE International Conference on Microelectronics (ICM 2016), Cairo Egypt, December 2016. R. Dicecco, G. Lacey, J. Vasiljevic, P. Chow, G. Taylor and S.Areibi `Caffeinated FPGAs: FPGA Framework For Convolutional Neural Networks' In IEEE International Conference on Field Programmable Technology (FPT), Xi'an China, December 2016. R. Pattison, Z. Abuowaimer, S. Areibi, G. Grewal and A. Vannelli `Invited Paper: GPlace - A Congestion-aware Placement tool for UltraScale FPGAs' In IEEE International Conference on Computer Aided Design, Austin Texas, November 2016. A. Shamli, G. Taylor and S. Areibi A Simple and Effective Semi-supervised Learning Framework for Hyperspectral Image Classification In IEEE System and Technologies for Remote Sensing Applications Through Unmanned Aerial Systems Workshop, Rochester NY, pp:14-18, October 2016. (Best Student Paper Award) B. Debowski, P. Spachos, S. Areibi Q-Learning Enhanced Gradient Based Routing for Balancing Energy Consumption in WSNs In 21st IEEE International Workshop on Computer Aided Modelling and Design of Communication Links and Networks, Toronto Canada, pp:18-23, October 2016. M. Elmahguibi, O. Ahmed, S. Areibi and G. Grewal Efficient AlgorithmSelection for Packet Classification using Meta-Learning In 21st IEEE International Workshop on Computer Aided Modelling and Design of Communication Links and Networks, Toronto Canada, pp:24-30, October 2016. R. Pattison, S. Areibi and G. Grewal 'Scalable Analytic Placement for FPGA on GPGPU'. In International Conference on Reconfigurable Computing and FPGAs, Cancun, Mexico, pp:1-6, December 2015. A. Al-Wattar, S. Areibi and G. Grewal 'Efficient mapping of Execution Units to Task Graphs using an Evolutionary Framework'. In International Symposium on Highly-Efficient Accelerators and Reconfigurable Technologies (HEART), Boston, MA, USA, pp: , June 2015. L. Richards, L. Antonie, S. Areibi, G. Grewal, K. Inwood and J. Ross 'Comparing Classifiers in Historical Census Linkage'. IEEE International Conference on Data Mining Workshop (ICDMW) , Shenzhen, China, pp: 1086-1094, December 2014. O. Ahmed, and S. Areibi 'An Efficient Application-Specific Instruction-Set Processor for Packet Classification'. IEEE International Conference on Reconfigurable Computing and FPGAs, Cancun, Mexico, pp: 1-6, December 2013. A. Mahmoud and R. Dony and and S. Areibi 'An Adaptive Encryption Based Genetic Algorithm for Medical Images'. IEEE International Workshop on Machine Learning for Signal Processing, Southhampton, UK, Sept. 2013. B. Debowski and S. Areibi and G. Grewal and J. Tempelman 'A Dynamic Sampling Framework for Multi-Class Imbalanced Data'. International Conference on Machine Learning and Applications (ICMLA 2012), Boca Raton, Florida, USA, pp: 113-118, December 2012. S. Sheikh-Nia and G. Grewal and S. Areibi 'A Sequential Ensemble Classification (SEC) System for Tackling the Problem of Unbalnce Learning: A Case Study'. International Conference on Machine Learning and Applications (ICMLA 2012), Boca Raton, Florida, USA, pp: 72-77, December 2012. A. Al-wattar and S. Areibi and F. Saffih 'Efficient On-line Hardware/Software Task Scheduling for Dynamic Run-time Reconfigurable Systems'. Reconfigurable Architectures Workshop (RAW 2012), Shanghai, China, pp: 401-406, May 2012. E. Elhossini and S. Areibi and R. Dony 'A Methodology for Modeling Embedded Processors for Architecture Exploration'. IEEE International Conference on Microelectronics (ICM 2011), Hammamet, Tunis, pp: 1-6, December 2011. O. Ahmed, and S. Areibi 'GBSA: A Group Based Search Algorithm for Packet Classification'. IEEE International Workshop on Traffic Analysis and Classification TRAC 2011, Istanbul, Turkey, pp: 1789-1794, July 2011. O. Ahmed, K. Chattha and S. Areibi 'A Hardware/Software Co-design Architecture for Packet Classification'. IEEE International Conference on Microelectronics (ICM 2010), Cairo, Egypt, pp: 96-99, December 2010. E. Elhossini and S. Areibi and J. Huissman and R. Dony 'An Efficient Scheduling Methodology for Heterogeneous Multi-Core Processor Systems'. IEEE International Conference on Microelectronics (ICM 2010), Cairo, Egypt, pp: 475-478, December 2010. O. Ahmed, S. Areibi and D. Fayek 'PCIU: An Efficient Packet Classification Algorithm with an Incremental Update Capabiltiy'. SPECTS 2010 International Symposium on Performance Evaluation of Computer and Telecommunication systems, Ottawa, Canada, pp: 81-88, July 2010. E. Armstrong, G. Grewal, S. Areibi and G. Darlington 'An Investigation of Parallel Memetic Algorithms for VLSI Circuit Partitioning on Multi-Core Computers'. IEEE Canadian Conference on Electrical and Computer Engineering, CCECE'10, Calgary, Canada, pp:1-6, May 2010. M. Ghazali, S. Areibi, G. Grewal, A. Erb, J. Spenceley 'A Comparison of Hardware Acceleration Methods for VLSI Maze Routing'. Symposium on Electronic Design Automation, Toronto, Canada, pp: 563-568, May 2009. M. Ghazali, A. Elhossini, S. Areibi 'HW/SW Co-Design Architecture Exploration for VLSI Maze Routing'. IEEE Canadian Conference on Electrical and Computer Engineering, CCECE'09, St. Johns, Newfoundland, Canada, pp: 1188-1193, May 2009. M. Xu, G. Grewal, S. Areibi, C. Obimbo and D. Banerji 'Near-Linear Wirelength Estimation for FPGA Placement'. IEEE Canadian Conference on Electrical and Computer Engineering, CCECE'09, St. Johns, Newfoundland, Canada, pp: 1198-1203, May 2009. A. Elhossini, S. Areibi and R. Dony Strength Pareto Particle Swarm Optimization. The Third International Conference on Modeling, Simulation and Applied Optimization, ICMSAO'09, Sharjah, UAE, January 2009. A. Younes, S. Areibi and P. Calamai A Hybridized Evolutionary Algorithm For Dynamic Flexible Manufacturing Systems. The Third International Conference on Modeling, Simulation and Applied Optimization, ICMSAO'09, Sharjah, UAE, January 2009. K. Shaban, A. Younes, S. Areibi, M. Boos and F. Kuyvenhoven A Comparison of Meta-Heuristics for Flexible Manufacturing Systems. The Third International Conference on Modeling, Simulation and Applied Optimization, ICMSAO'09, Sharjah, UAE, January 2009. A. Younes, A. Elkamel, S. Areibi and A. Lohi Evolutionary Algorithms: What, When and How. The Third International Conference on Modeling, Simulation and Applied Optimization, ICMSAO'09, Sharjah, UAE, January 2009. A. Sghaier, S. Areibi and R. Dony IEEE802.16-2004 OFDM Functions Implementation on FPGAs with Design Exploration. The International Conference on Field Programmable Logic and Applications (FPL), Germany, Sep 2008. A. Elhossini and S. Areibi and R. Dony An Architecture Exploration Framework for DSP Applications. The Canadian Conference on Electrical and Computer Engineering, Niagra Falls, Canada, May 2008. A. Sghaier and S. Areibi and Robert Dony A Pipelined Implementation of OFDM Transmission on Reconfigurable Platforms. The Canadian Conference on Electrical and Computer Engineering, Niagra Falls, Canada, May 2008. D. Hermann and R. Dony and S. Areibi Oversampled Filter Bank Evaulation for Joint Subband Audio Processing and Coding. The Canadian Conference on Electrical and Computer Engineering, Niagra Falls, Canada, May 2008. D. Hermann, R. Dony and S. Areibi Window Based Prototype Filter Design for Highly Oversampled Filter Banks in Audio Appliations. IEEE International Conference on Acoustics, Speech, and Signal Processing, ICASSP'07, Honolulu, USA, pp:405-408, April 2007. C. Freeman, R. Dony and S. Areibi Audio Environment Classification for Hearing Aids using ANNs with Windowed Input. First IEEE Symposium on Computational Intelligence in Image and Signal Processing CIISP'07, Honolulu, USA, pp:183-188, April 2007. Z. Yang, S. Areibi and A. Vannelli A Comparison of ILP based Global Routing Models for VLSI ASIC Design. Midwest Symposium on Circuits and Systems MWSCAS'07, Montreal, Canada, pp:1141-1144, August 2007. A. Younes and S. Areibi and P. Calamai An Adaptive Evolutionary Algorithm for Dynamic Flexible Manufacturing Systems. Second International Conference on Modeling, Simulation and Applied Optimization, ICMSAO'07, Abu Dhabi, UAE, March 2007. A. Elhossini, S. Areibi and R. Dony An FPGA Implementation of the LMS Adaptive Filter for Audio Processing. IEEE International Conference on Reconfiguable Computing and FPGAs, ReConFig'06, Puebla, Mexico, pp: 168-175, June 2006 X. Li, S. Areibi and R. Dony Parallel Processing on FPGAs: The Effect of Profiling on Performance IEEE International Workshop on System on a Chip, IWSOC'06, Cairo, Egypt, pp:179-184, Dec 2006 F. Li and S. Areibi A Hardware/Software Co-Design Approach for VLSI Circuit Partitioning. IEEE International Workshop on System on a Chip, IWSOC'06, Cairo, Egypt, pp: 81-85, Dec 2006 V. Pandya, S. Areibi and M. Moussa A Handel-C Implementation of the Back-Propagation Algorithm On Field Programmable Gate Arrays. International Conference on Reconfiguable Computing and FPGAs, ReConFig'05 Puebla, Mexico, pp:14-21, Sep 2005 D. Asmar, A. Elshamli and S. Areibi A Compartive Assessment of ACO Algorithms Within a TSP Environment DCDIS 2005, Guelph, Ontario, Canada, Guelph, Ontario, Canada, pp: 462-467, Jul 2005 P. Ghafari, E. Mirhad, M. Anis, S. Areibi and M. Elmasry A Low-Power Partitioning Methodology by Maximizing Sleep Time and Minimizing Cut Nets IWSOC 2005, Banf, Alberta, Canada, pp: 368-371, Jul 2005 S. Coe, S. Areibi and M. Moussa A Genetic Local Search Hybrid Architecture for VLSI Circuit Partitioning 16th International Conference on Microelectronics, Tunis, Tunisia, pp: 129-132, Dec 2004 X. Li and S. Areibi A Hardware/Software Co-design Approach for Face Recognition 16th International Conference on Microelectronics, Tunis, Tunisia, pp: 67-70, Dec 2004 W. Wang, M. Anis, and S. Areibi Fast Techniques for Standby Leakage Reduction in MTCMOS Circuits System On Chip Conference, SOC04, Santa Clara, pp: 21-24, Sep 2004 P. Du, G. Grewal, S. Areibi and D. Banerji A Fast Hierarchical Approach to FPGA Placement Proceedings of the International Conference on Embedded Systems & Applications (ESA'04), Las Vegas Nevada, USA, pp: 497-503, June 2004 P. Du, G. Grewal, S. Areibi and D. Banerji A Fast Adaptive Heuristic for FPGA Placement The 2nd Annual IEEE Northwest Workshop on Circuits and Systems, Montreal Canada, pp: 373-376, June 2004 G. Lu and S. Areibi An Island Based GA Implementation for VLSI Standard Cell Placement Genetic and Evolutionary Computation COnference (GECCO-2004), Seattle Washington, USA, pp: 1138-1150, June 2004 S. Areibi and Z. Yang Congestion Driven Placement 15th International conference in Microelectronics, Cairo, Egypt, pp: 304-307, Dec 2003 H. Homayounfar, S. Areibi and F. Wang An Advanced Island Based GA For Optimization Problems DCDIS Conference Guelph, Ontario, Canada, pp: 46-51, May 2003 G. Koonar, S. Areibi, M. Moussa Hardware Implementation Of Genetic Algorithms for VLSI CAD Design CAINE, San Diego California, pp: 197-200, Nov 2002 K. Nichols, M. Moussa, S. Areibi Feasibility of Floating-Point Arithmetic in FPGA based Artificial Neural Networks CAINE, San Diego California, pp: 8-13, Nov 2002 H. Homayounfar, F. Wang, S. Areibi Advanced P2P Architecture Using Autonomous Agents CAINE, San Diego California, pp: 115-118, Nov 2002 Z. Yang S. Areibi Global Placement for VLSI Standard Cell Design CAINE, San Diego California, pp: 243-247, Nov 2002 H. Ghenniwa and S. Areibi, Agent-Orientation for Evolutionary Computation ECOMS Workshop in New York, pp: 57-65, July 2002 A. Younes and H. Ghenniwa and S. Areibi, An Adaptive Genetic Algorithm for Multi-Objective Flexible Manufacturing Systems GECCO, New York, pp: 1241-1249, July 2002. M. Anis, S. Areibi, M. Mahmoud, M. Elmasry Dynamic and Leakage Power Reduction in MTCMOS Circuits Using an Automated Efficient Gate Clustering Technique IEEE Design Automation Conference (DAC02), New Orelans, pp: 480-486, June 2002 S. Areibi, Recursive and Flat Partitioning for VLSI Circuit Design The 13th International Conference on Microelectronics Rabat, Morocco, pp: 237-240, October 2001. S. Areibi, A First Course in Digital Design Using VHDL and Programmable Logic Frontiers in Education (FIE 2001), Reno, Nevada, October 2001. S. Areibi, M. Thompson, A. Vannelli A Clustering Utility Based Approach for ASIC Design 14th Annual IEEE International ASIC/SOC Conference Washington, DC, pp: 248-252, September 2001. S. Areibi Iterative Improvement Heuristics for the Standard Cell Placement: A Comparison The 5th World Multiconference on Systemics , Cybernetics and Informatics (SCI2001) Orlando, Florida, pp: 89-94, July 2001. F. Yuan, S. Areibi Area and Power Minimization of CMOS Combinational Circuits Using a Modified Simulated Annealing Technique The 5th World Multiconference on Systemics , Cybernetics and Informatics (SCI2001) Orlando, Florida, pp: 40-45, July 2001. S. Areibi Memetic Algorithms for VLSI Physical Design: Implementation Issues Genetic and Evolutionary Computation Conference GECCO'01, San Fransisco, California, pp: 140-145, July 2001. S. Areibi and M. Thompson and A. Vannelli, A Utility-Based Iterative Improvement Heuristic for Standard Cell Placement First International Conference on Engineering and Reconfigurable Systems and Algorithms (ERSA2001), Las Vegas, Nevada, pp: 1470-1476, June 2001. S. Areibi, M. Moussa, H. Abdullah, A Comparison of Genetic/Memetic Algorithms and Heuristic Searching International Conference on Artificial Intelligence IC-AI 2001, Las Vegas, Nevada, pp: 660-666, June 2001. S. Areibi and M. Thompson, A New Model for Macrocell Partitioning 16 International Conference On Computers and Their Applications, Seattle, Washington, pp: 161-165, April 2001. S. Areibi and J. Zelek, A Smart Reconfigurable Visual System for the Blind Tunisian-German Conference on :Smart Systems and Devices, Hamamat, Tunis, pp: 628-633, March 2001. S. Areibi, An Integrated Genetic Algorithm With Dynamic Hill Climbining for VLSI Circuit Partitioning IEEE Genetic and Evolutionary Computation Conference (GECCO), Las Vegas, Nevada, pp: 97-102, July 2000. S. Areibi, Efficient Hybrid Search Techniques For Circuit Partitioning. IEEE 4th World Multiconference on Circuits, Systems, Communications & Computers, Athens, Greece, July 2000. H. Tawil, S. Areibi, A. Vannelli, Attractor-Repeller Approach for Global Placement IEEE/ACM International Conference on Computer Aided Design (ICCAD), San Jose California, pp: 20-24, November 1999 S. Areibi, The Effect of Clustering and Local Search on Genetic Algorithms Recent Advances In Soft Computing, Leicester, UK, pp: 172-177, July 1999 S. Areibi, An Adaptive Tabu Search Approach For Circuit Partitioning. ISCA 11th International Conference On Computer Applications In Industry and Engineering, Las Vegas, Nevada, pp: 179-182, November 1998 S. Areibi, A Combined Tabu Search Column Generation Technique for Vehicle Scheduling. The Seventh International Special Conference on IFORS, Gothenburg, Sweden, pp: 48-52, June 1997 S. Areibi and A. Vannelli, An Efficient Clustering Technique for Circuit Partitioning. IEEE International Symposium On Circuits And Systems, San Diego, California, pp: 671-674, July 1996 S. Areibi and A. Vannelli, An Efficient Solution To Circuit Partitioning Using Tabu Search And Genetic Algorithms. In 6th International Conference of Micro Electronics, Istanbul, Turkey, pp: 70-74, February 1994. S. Areibi and A. Vannelli, A Combined Eigenvector Tabu Search Approach For Circuit Partitioning. Proceedings Of The 1993 Custom Integrated Circuits Conference, San Diego, pp: 9.7.1-9.7.4 April 1993 S. Areibi and A. Vannelli, Circuit Partitioning Using a Tabu Search Approach. IEEE International Symposium On Circuits And Systems, Chicago, Illinois, pp: 1643-1646, March 1993
Conference Papers (Submitted and Under Review)
Posters and Other Contributions (Conference Papers with an Abstract Review): L. Richards, L. Antonie, S.Areibi and G. Grewal Using HPC to Evaluate different Classification Techniques for Record-Linkage in Digital Humanities Sharcnet Research Day, Guelph, Canada, May 2012 (Oral Presentation). S. Sheikh Nia, B. Debowski, S.Areibi and G. Grewal Investigation of Standalone Classifiers for the Prediction of Hospitalization Duration Sharcnet Research Day, Guelph, Canada, May 2012 (Poster). A. Shamli, H. Abdullah and S. Areibi Genetic Algorithms for Dynamic Path Planning Canadian Conference on Electrical and Computer Engineering (CCECE 2004), Niagra Falls, Canada, pp: 677-680, May 2004. X. Bao and S. Areibi Constructive and Local Search Heuristic Techniques for FPGA Placement Canadian Conference on Electrical and Computer Engineering (CCECE 2004), Niagra Falls, Canada, pp: 505-508, May 2004. H. Sun and S. Areibi Global Routing for VLSI Standard Cells Canadian Conference on Electrical and Computer Engineering (CCECE 2004), Niagra Falls, Canada, pp: 485-488, May 2004. Z. Yang and S. Areibi A Comparison of Several Constructive Techniques for VLSI Circuit Placement 2nd Annual McMaster Optimization Conference: Theory and Applications (MOPTA 02), Hamilton, Canada, Aug 2002. H. Homayounfar, S. Areibi, F. Wang An Island Based Genetic Algorithm for Dynamic Optimization Problems 2nd Annual McMaster Optimization Conference: Theory and Applications (MOPTA 02), Hamilton, Canada, Aug 2002. K. Nichols, M. Moussa and S. Areibi A Reconfigurable Architecture for Neural Networks Workshop on Reconfigurable Manufacturing, Hamilton, Canada, Oct 2001. S. Areibi, M. Xie, A. Vannelli An Efficient Rectilinear Steiner Tree Algorithm for VLSI Global Routing Canadian Conference on Electrical and Computer Engineering (CCECE2001), Toronto, Canada, May 2001. S. Areibi, Simple Yet Effective Techniques to Improve Flat Multiway Circuit Partitioning IEEE Canadian Conference on Electrical and Computer Engineering Nova Scotia, Canada, May 2000. S. Areibi, GRASP: An Effective Constructive Technique For VLSI Circuit Partitioning IEEE Canadian Conference on Electrical and Computer Engineering, Edmonton, Alberta, Canada. May 1999 S. Areibi and A. Vannelli , Distributed Advanced Search Techniques for Circuit Partitioning. IEEE Canadian Conference on Electrical and Computer Engineering Waterloo, Ont, Canada, May 1998. S. Areibi and A. Vannelli , A Unified Partitioning and Placement Approach based on Tabu Search Algorithm. 15th International Symposium on Mathematical Programming Ann Arbor, Michigan, May 1994. S. Areibi and A. Vannelli , A Hybrid GA and Tabu Search Method for VLSI Circuit Layout. TIMS XX-XII Conference Anchorage, Alaska, June 1994.
Thesis: S. Areibi , Towards Optimal Circuit Layout Using Advanced Search Techniques Phd Thesis, University of Waterloo, 1995.
Technical Reports: L. StOnge, S. Areibi , A First look at VHDL For Digital Design. Technical Report, University of Guelph, 2001. S. Areibi , VHDL For Digital Design. Technical Report, University of Guelph, 2000. S. Areibi , Overview of VLSI Circuit Partitioning. Technical Report, University of Guelph, 2000.

This page was last updated Sept. 2023.

Complete Publication List 1993-2024

Abstracts of all published papers: 1993 - 2024 Summary of Abstracts

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Conference Papers (Submitted and Under Review)

Posters and Other Contributions (Conference Papers with an Abstract Review):

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Technical Reports: